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SoC Digital Circuits Design Intern

2020-09-04

Responsibilities

  • According to SoC chips’ specifications, completing IP modules with regard to:
  1. Writing and maintenance of design specifications;
  2. Designing and maintenance of RTL code;
  3. Integration on SoC chips.
  • Functional verification of RTL code;
  • Supporting digital verification, FPGA verification and chip testing.

Requirements

  • PhD or master students majoring in Communications Engineering, Automation Control, Electronics or Microelectronics;
  • Solid basic knowledge of digital circuits;
  • Knowledge of ASIC design process and FPGA design process;
  • Knowledge of wireless communication and radar systems preferred;
  • At least 3 days a week for 6 months or longer.